1. Field of the Invention
This invention relates to a semiconductor memory device having floating gate avalanche MOS FETs.
2. Description of the Related Art
Floating gate avalanche MOS FETs and the like are used as memory cells in a non-volatile semiconductor memory such as an Erasable Programmable Read-Only Memory (EPROM) or an Electrically Erasable Programmable Read Only Memory (EEPROM). These memory devices incorporate bias voltage supply circuits for supplying a bias voltage to memory cells.
The bias voltage may be unstable in some memory devices which are not formed according to the present invention. However, if an inferior device is detected by measuring bias voltages in devices after they have been produced, it cannot be eliminated from the other.